深入超标量架构与并行执行技术

15.1.2 指令级并行的实际限制

虽然理论上可以同时执行多条指令，但实践中存在多种限制因素。这些限制包括数据依赖、控制依赖和资源冲突等。

class InstructionParallelismAnalyzer:
    """指令级并行性分析器"""
    def __init__(self):
        self.data_dependencies = []
        self.control_dependencies = []
        self.resource_conflicts = []

    def analyze_program(self, program):
        """分析程序的并行性限制"""
        print("分析程序并行性限制...")
        print("程序代码:")
        for i, instr in enumerate(program):
            print(f" {i}: {instr}")
        print("\n1. 数据依赖分析:")
        self._analyze_data_dependencies(program)
        print("\n2. 控制依赖分析:")
        self._analyze_control_dependencies(program)
        print("\n3. 资源冲突分析:")
        self._analyze_resource_conflicts(program)
        print("\n4. 并行性限制总结:")
        self._print_limitations_summary()

    def _analyze_data_dependencies(self, program):
        """分析数据依赖（RAW, WAR, WAW）"""
        # 记录寄存器的定义和使用
        reg_defs = {}  # 寄存器 -> 最后定义的指令索引
        reg_uses = {}  # 寄存器 -> 使用该寄存器的指令列表
        for i, instr in enumerate(program):
            # 简化分析：提取指令中的寄存器
            registers = self._extract_registers(instr)
            for reg in registers:
                if reg not in reg_uses:
                    reg_uses[reg] = []
                reg_uses[reg].append(i)
                # 如果是写入寄存器的指令
                if self._is_write_instruction(instr):
                    write_reg = self._get_write_register(instr)
                    if write_reg:
                        # 检查 WAW（写后写）依赖
                        if write_reg in reg_defs:
                            last_def = reg_defs[write_reg]
                            print(f" 指令{i}与指令{last_def}存在 WAW 依赖（寄存器{write_reg}）")
                            self.data_dependencies.append(('WAW', i, last_def, write_reg))
                        # 检查 WAR（写后读）依赖
                        if write_reg in reg_uses:
                            for use_instr in reg_uses[write_reg]:
                                if use_instr < i:
                                    print(f" 指令{i}与指令{use_instr}存在 WAR 依赖（寄存器{write_reg}）")
                                    self.data_dependencies.append(('WAR', i, use_instr, write_reg))
                        # 更新最后定义
                        reg_defs[write_reg] = i
            # 检查 RAW（读后写）依赖
            read_regs = self._get_read_registers(instr)
            for read_reg in read_regs:
                if read_reg in reg_defs:
                    last_def = reg_defs[read_reg]
                    print(f" 指令{i}与指令{last_def}存在 RAW 依赖（寄存器{read_reg}）")
                    self.data_dependencies.append(('RAW', i, last_def, read_reg))

    def _analyze_control_dependencies(self, program):
        """分析控制依赖"""
        branch_indices = []
        for i, instr in enumerate(program):
            if 'BRANCH' in instr or 'JUMP' in instr or 'CALL' in instr:
                branch_indices.append(i)
                print(f" 指令{i}是分支指令：{instr}")
        # 分析分支后的指令对分支的依赖
        for branch_idx in branch_indices:
            # 分支后的指令依赖于分支的条件
            for i in range(branch_idx + 1, len(program)):
                if i < len(program):
                    print(f" 指令{i}控制依赖于指令{branch_idx}")
                    self.control_dependencies.append((i, branch_idx))
                    # 直到下一个分支或程序结束
                    if i < len(program) and ('BRANCH' in program[i] or 'JUMP' in program[i]):
                        break

    def _analyze_resource_conflicts(self, program):
        """分析资源冲突"""
        # 假设的处理器资源
        resources = {'ALU': 2, 'MEM': 1, 'BRANCH': 1, 'FPU': 1}
        # 每周期使用的资源
        for cycle in range(0, len(program), 2):
            # 假设 2 指令/周期
            cycle_resources = {'ALU': 0, 'MEM': 0, 'BRANCH': 0, 'FPU': 0}
            cycle_instrs = []
            for i in range(cycle, min(cycle + 2, len(program))):
                instr = program[i]
                cycle_instrs.append(i)
                # 确定指令使用的资源
                if 'ADD' in instr or 'SUB' in instr or 'MUL' in instr:
                    cycle_resources['ALU'] += 1
                elif 'LOAD' in instr or 'STORE' in instr:
                    cycle_resources['MEM'] += 1
                elif 'BRANCH' in instr:
                    cycle_resources['BRANCH'] += 1
                elif 'FADD' in instr or 'FMUL' in instr:
                    cycle_resources['FPU'] += 1
            # 检查资源冲突
            conflicts = []
            for resource, count in cycle_resources.items():
                if count > resources[resource]:
                    conflicts.append(resource)
            if conflicts:
                print(f" 周期{cycle//2}: 指令{cycle_instrs}存在资源冲突 ({', '.join(conflicts)})")
                self.resource_conflicts.append((cycle//2, cycle_instrs, conflicts))

    def _extract_registers(self, instr):
        """从指令中提取寄存器"""
        import re
        registers = []
        # 查找 R 后跟数字的模式
        matches = re.findall(r'R(\d+)', instr)
        for match in matches:
            registers.append(f'R{match}')
        # 查找 [Xx] 后跟数字的模式（ARM 风格）
        matches = re.findall(r'[Xx](\d+)', instr)
        for match in matches:
            registers.append(f'X{match}')
        return registers

    def _is_write_instruction(self, instr):
        """判断是否是写入寄存器的指令"""
        write_patterns = ['ADD', 'SUB', 'MUL', 'LOAD', 'MOV']
        for pattern in write_patterns:
            if pattern in instr:
                return True
        return False

    def _get_write_register(self, instr):
        """获取写入的寄存器"""
        registers = self._extract_registers(instr)
        if registers:
            return registers[0]  # 假设第一个寄存器是目标寄存器
        return None

    def _get_read_registers(self, instr):
        """获取读取的寄存器"""
        registers = self._extract_registers(instr)
        if registers and len(registers) > 1:
            return registers[1:]  # 假设第一个是目标，其余是源
        return []

    def _print_limitations_summary(self):
        """打印限制总结"""
        total_instructions = 10  # 假设的程序长度
        print(f" 数据依赖总数：{len(self.data_dependencies)}")
        print(f" 控制依赖总数：{len(self.control_dependencies)}")
        print(f" 资源冲突数：{len(self.resource_conflicts)}")
        # 计算理论并行度
        if total_instructions > 0:
            # 简化计算：考虑依赖限制
            parallel_factor = total_instructions / (1 + len(self.data_dependencies) * 0.5)
            print(f" 理论并行度：{parallel_factor:.2f} (理想情况为{total_instructions})")
        print("\n 优化建议:")
        if len(self.data_dependencies) > 5:
            print(" • 考虑使用寄存器重命名减少假依赖")
        if len(self.control_dependencies) > 3:
            print(" • 使用分支预测减少控制依赖影响")
        if len(self.resource_conflicts) > 2:
            print(" • 平衡指令混合，避免资源过载")

def demonstrate_parallelism_limitations():
    """演示并行性限制"""
    print("=== 指令级并行性限制分析 ===")
    # 示例程序
    example_program = [
        "LOAD R1, [R10]",  # 0
        "LOAD R2, [R11]",  # 1
        "ADD R3, R1, R2",  # 2 (依赖 0,1)
        "MUL R4, R3, R2",  # 3 (依赖 2,1)
        "STORE R4, [R12]", # 4 (依赖 3)
        "BRANCH LOOP_START", # 5
        "ADD R5, R6, R7",  # 6 (控制依赖 5)
        "LOAD R8, [R13]",  # 7 (控制依赖 5)
        "SUB R9, R5, R8",  # 8 (依赖 6,7)
        "STORE R9, [R14]"  # 9 (依赖 8)
    ]
    analyzer = InstructionParallelismAnalyzer()
    analyzer.analyze_program(example_program)
    print("\n=== 实际编程中的并行性考虑 ===")
    # C++ 示例：展示如何编写有利于并行的代码
    cpp_example = """ // 不利于并行的代码
    void sequentialComputation(float* a, float* b, float* c, int n) {
        for (int i = 0; i < n; i++) {
            a[i] = b[i] * c[i]; // 依赖前一次迭代
            b[i] = a[i] + 1.0f; // 依赖 a[i] 的计算
        }
    }
    // 有利于并行的代码
    void parallelFriendlyComputation(float* a, float* b, float* c, int n) {
        // 第一个循环：独立的乘法操作
        for (int i = 0; i < n; i++) {
            a[i] = b[i] * c[i]; // 无跨迭代依赖
        }
        // 第二个循环：独立的加法操作
        for (int i = 0; i < n; i++) {
            b[i] = a[i] + 1.0f; // 使用上一步的结果，但循环内无依赖
        }
        // 或者使用 SIMD 指令
        #ifdef USE_SIMD
        for (int i = 0; i < n; i += 4) {
            // 同时处理 4 个元素
            __m128 b_vec = _mm_load_ps(&b[i]);
            __m128 c_vec = _mm_load_ps(&c[i]);
            __m128 a_vec = _mm_mul_ps(b_vec, c_vec);
            _mm_store_ps(&a[i], a_vec);
            __m128 one = _mm_set1_ps(1.0f);
            __m128 b_new = _mm_add_ps(a_vec, one);
            _mm_store_ps(&b[i], b_new);
        }
        #endif
    } """
    print("C++代码示例：")
    print(cpp_example)
    print("\n关键优化技术：")
    print("1. 循环展开：减少分支指令，增加指令级并行")
    print("2. 软件流水线：重新安排指令以减少依赖")
    print("3. 数据预取：提前加载数据到缓存")
    print("4. 分支预测提示：给编译器提供分支概率信息")
    print("5. 向量化：使用 SIMD 指令同时处理多个数据")

if __name__ == "__main__":
    demonstrate_parallelism_limitations()

15.2 超标量处理器设计要素

15.2.1 指令并行与机器并行关系

指令级并行性是指程序中指令之间可以同时执行的潜力，而机器并行性是指处理器硬件实际支持同时执行指令的能力。两者之间的关系决定了处理器的实际性能。

#include <iostream>
#include <vector>
#include <queue>
#include <map>
#include <algorithm>

class MachineParallelismAnalyzer {
private:
    // 处理器配置
    struct ProcessorConfig {
        int issueWidth; // 发射宽度
        int aluUnits;   // ALU 单元数
        int loadStoreUnits; // 加载/存储单元数
        int branchUnits;    // 分支单元数
        int renameRegisters;// 重命名寄存器数
        int robSize;        // 重排序缓冲区大小
        ProcessorConfig() : issueWidth(4), aluUnits(3), loadStoreUnits(2), branchUnits(1), renameRegisters(128), robSize(192) {}
    };
    // 指令类型
    enum class InstructionType { ALU, LOAD, STORE, BRANCH, OTHER };
    // 指令信息
    struct InstructionInfo {
        int id;
        InstructionType type;
        std::string opcode;
        int latency; // 延迟（周期数）
        bool hasDependency; // 是否有依赖
        std::vector<int> dependencies; // 依赖的指令 ID
        InstructionInfo(int i, InstructionType t, const std::string& op, int lat) : id(i), type(t), opcode(op), latency(lat), hasDependency(false) {}
    };
    ProcessorConfig config;
    std::vector<InstructionInfo> program;
public:
    MachineParallelismAnalyzer(const ProcessorConfig& cfg) : config(cfg) {
        std::cout << "机器并行性分析器初始化：" << std::endl;
        std::cout << " 发射宽度：" << config.issueWidth << std::endl;
        std::cout << " 执行单元：" << config.aluUnits << " ALU, " << config.loadStoreUnits << " 内存，" << config.branchUnits << " 分支" << std::endl;
        std::cout << " 重命名寄存器：" << config.renameRegisters << std::endl;
        std::cout << " ROB 大小：" << config.robSize << std::endl;
    }
    // 分析程序中的指令级并行性
    void AnalyzeILP(const std::vector<std::string>& code) {
        std::cout << "\n分析程序指令级并行性..." << std::endl;
        // 将代码转换为指令信息
        for (size_t i = 0; i < code.size(); i++) {
            InstructionType type = ClassifyInstruction(code[i]);
            int latency = GetInstructionLatency(type);
            program.emplace_back(i, type, code[i], latency);
            std::cout << " 指令" << i << ": " << code[i] << " (类型：" << TypeToString(type) << ", 延迟：" << latency << "周期)" << std::endl;
        }
        // 分析依赖关系
        AnalyzeDependencies();
        // 计算理论 ILP
        CalculateTheoreticalILP();
        // 模拟执行，考虑机器限制
        SimulateExecution();
    }
    InstructionType ClassifyInstruction(const std::string& instr) {
        if (instr.find("ADD") == 0 || instr.find("SUB") == 0 || instr.find("MUL") == 0 || instr.find("AND") == 0) return InstructionType::ALU;
        else if (instr.find("LOAD") == 0) return InstructionType::LOAD;
        else if (instr.find("STORE") == 0) return InstructionType::STORE;
        else if (instr.find("BRANCH") == 0 || instr.find("JUMP") == 0) return InstructionType::BRANCH;
        else return InstructionType::OTHER;
    }
    std::string TypeToString(InstructionType type) {
        switch (type) {
        case InstructionType::ALU: return "ALU";
        case InstructionType::LOAD: return "LOAD";
        case InstructionType::STORE: return "STORE";
        case InstructionType::BRANCH: return "BRANCH";
        default: return "OTHER";
        }
    }
    int GetInstructionLatency(InstructionType type) {
        // 简化的延迟模型
        switch (type) {
        case InstructionType::ALU: return 1;
        case InstructionType::LOAD: return 3; // 包括缓存访问
        case InstructionType::STORE: return 2;
        case InstructionType::BRANCH: return 1;
        default: return 1;
        }
    }
    void AnalyzeDependencies() {
        std::cout << "\n依赖关系分析：" << std::endl;
        // 简化的依赖检测
        // 在实际分析中，需要更复杂的寄存器跟踪
        // 假设的依赖关系（用于演示）
        if (program.size() > 1) {
            // 指令 1 依赖指令 0
            program[1].hasDependency = true;
            program[1].dependencies.push_back(0);
            std::cout << " 指令 1 依赖指令 0" << std::endl;
        }
        if (program.size() > 3) {
            // 指令 3 依赖指令 2
            program[3].hasDependency = true;
            program[3].dependencies.push_back(2);
            std::cout << " 指令 3 依赖指令 2" << std::endl;
        }
        if (program.size() > 5) {
            // 指令 5 依赖指令 4
            program[5].hasDependency = true;
            program[5].dependencies.push_back(4);
            std::cout << " 指令 5 依赖指令 4" << std::endl;
        }
    }
    void CalculateTheoreticalILP() {
        std::cout << "\n理论 ILP 计算：" << std::endl;
        int totalInstructions = program.size();
        int independentChunks = 0;
        int currentChunkSize = 0;
        // 简化计算：基于依赖关系分块
        for (const auto& instr : program) {
            if (instr.hasDependency) {
                // 依赖开始新的块
                if (currentChunkSize > 0) {
                    independentChunks++;
                    std::cout << " 独立块" << independentChunks << ": " << currentChunkSize << "条指令" << std::endl;
                }
                currentChunkSize = 1;
            } else {
                currentChunkSize++;
            }
        }
        if (currentChunkSize > 0) {
            independentChunks++;
            std::cout << " 独立块" << independentChunks << ": " << currentChunkSize << "条指令" << std::endl;
        }
        // 理论 ILP：每个块可以并行执行
        float theoreticalILP = 0;
        for (int i = 1; i <= independentChunks; i++) {
            // 简化：假设每个块的指令数代表并行度
            theoreticalILP += (i <= 3) ? 3.0f : 1.0f; // 前 3 个块并行度高
        }
        theoreticalILP /= independentChunks;
        std::cout << " 理论平均 ILP: " << theoreticalILP << std::endl;
        std::cout << " 最大可能 ILP: " << config.issueWidth << " (发射宽度限制)" << std::endl;
    }
    void SimulateExecution() {
        std::cout << "\n模拟执行（考虑机器限制）：" << std::endl;
        // 模拟资源
        int availableALU = config.aluUnits;
        int availableMem = config.loadStoreUnits;
        int availableBranch = config.branchUnits;
        int currentCycle = 0;
        std::vector<int> completionTime(program.size(), 0);
        std::queue<int> instructionQueue;
        // 初始化队列
        for (size_t i = 0; i < program.size(); i++) {
            instructionQueue.push(i);
        }
        // 模拟执行循环
        while (!instructionQueue.empty()) {
            currentCycle++;
            int instructionsIssued = 0;
            std::cout << "\n周期 " << currentCycle << ":" << std::endl;
            // 尝试发射指令（考虑发射宽度限制）
            std::vector<int> issuedThisCycle;
            while (instructionsIssued < config.issueWidth && !instructionQueue.empty()) {
                int instrId = instructionQueue.front();
                const auto& instr = program[instrId];
                // 检查依赖是否满足
                bool dependenciesSatisfied = true;
                for (int depId : instr.dependencies) {
                    if (completionTime[depId] >= currentCycle) {
                        dependenciesSatisfied = false;
                        break;
                    }
                }
                // 检查资源可用性
                bool resourcesAvailable = false;
                switch (instr.type) {
                case InstructionType::ALU: resourcesAvailable = (availableALU > 0); break;
                case InstructionType::LOAD:
                case InstructionType::STORE: resourcesAvailable = (availableMem > 0); break;
                case InstructionType::BRANCH: resourcesAvailable = (availableBranch > 0); break;
                default: resourcesAvailable = true;
                }
                if (dependenciesSatisfied && resourcesAvailable) {
                    // 发射指令
                    instructionQueue.pop();
                    issuedThisCycle.push_back(instrId);
                    instructionsIssued++;
                    // 占用资源
                    switch (instr.type) {
                    case InstructionType::ALU: availableALU--; break;
                    case InstructionType::LOAD:
                    case InstructionType::STORE: availableMem--; break;
                    case InstructionType::BRANCH: availableBranch--; break;
                    }
                    // 设置完成时间
                    completionTime[instrId] = currentCycle + instr.latency;
                    std::cout << " 发射指令" << instrId << ": " << instr.opcode;
                    if (instr.hasDependency) {
                        std::cout << " (有依赖)";
                    }
                    std::cout << std::endl;
                } else {
                    // 无法发射更多指令（依赖或资源限制）
                    break;
                }
            }
            // 释放资源（指令完成）
            for (size_t i = 0; i < program.size(); i++) {
                if (completionTime[i] == currentCycle) {
                    // 指令完成，释放资源
                    switch (program[i].type) {
                    case InstructionType::ALU: availableALU++; break;
                    case InstructionType::LOAD:
                    case InstructionType::STORE: availableMem++; break;
                    case InstructionType::BRANCH: availableBranch++; break;
                    }
                    std::cout << " 指令" << i << "完成" << std::endl;
                }
            }
            if (instructionsIssued == 0 && !instructionQueue.empty()) {
                std::cout << " 停顿：依赖或资源限制" << std::endl;
            }
        }
        // 计算实际性能
        int lastCompletion = *std::max_element(completionTime.begin(), completionTime.end());
        float actualIPC = static_cast<float>(program.size()) / currentCycle;
        std::cout << "\n执行结果：" << std::endl;
        std::cout << " 总指令数：" << program.size() << std::endl;
        std::cout << " 总周期数：" << currentCycle << std::endl;
        std::cout << " 实际 IPC: " << actualIPC << std::endl;
        std::cout << " 最后完成时间：周期" << lastCompletion << std::endl;
        // 计算机器并行性利用率
        float machineUtilization = actualIPC / config.issueWidth;
        std::cout << " 机器并行性利用率：" << (machineUtilization * 100) << "%" << std::endl;
    }
};

// 实际编程示例：展示如何利用机器并行性
class ParallelOptimizationExample {
public:
    static void DemonstrateOptimizations() {
        std::cout << "\n=== 实际编程中的并行性优化 ===" << std::endl;
        // 示例 1：循环展开
        std::cout << "\n1. 循环展开示例：" << std::endl;
        std::string loopUnrollingCode = R"(
            // 原始循环（低并行性）
            void originalLoop(float* a, float* b, int n) {
                for (int i = 0; i < n; i++) {
                    a[i] = b[i] * 2.0f;
                }
            }
            // 展开 4 次的循环（提高并行性）
            void unrolledLoop(float* a, float* b, int n) {
                int i;
                for (i = 0; i < n - 3; i += 4) {
                    // 编译器可以并行调度这些独立的操作
                    a[i] = b[i] * 2.0f;
                    a[i+1] = b[i+1] * 2.0f;
                    a[i+2] = b[i+2] * 2.0f;
                    a[i+3] = b[i+3] * 2.0f;
                }
                // 处理剩余元素
                for (; i < n; i++) {
                    a[i] = b[i] * 2.0f;
                }
            }
        )";
        std::cout << loopUnrollingCode << std::endl;
        // 示例 2：数据布局优化
        std::cout << "\n2. 数据布局优化示例：" << std::endl;
        std::string dataLayoutCode = R"(
            // 不好的数据布局（结构体数组）
            struct Particle {
                float x, y, z;
                float vx, vy, vz;
                float mass;
            };
            void updateParticlesBad(Particle* particles, int n) {
                for (int i = 0; i < n; i++) {
                    // 访问分散的内存位置，缓存不友好
                    particles[i].x += particles[i].vx;
                    particles[i].y += particles[i].vy;
                    particles[i].z += particles[i].vz;
                }
            }
            // 好的数据布局（数组结构体）
            struct ParticleSystem {
                std::vector<float> x, y, z;
                std::vector<float> vx, vy, vz;
                std::vector<float> mass;
            };
            void updateParticlesGood(ParticleSystem& system, int n) {
                // 连续内存访问，有利于预取和向量化
                for (int i = 0; i < n; i++) {
                    system.x[i] += system.vx[i];
                }
                for (int i = 0; i < n; i++) {
                    system.y[i] += system.vy[i];
                }
                for (int i = 0; i < n; i++) {
                    system.z[i] += system.vz[i];
                }
            }
        )";
        std::cout << dataLayoutCode << std::endl;
        // 示例 3：依赖消除
        std::cout << "\n3. 依赖消除示例：" << std::endl;
        std::string dependencyCode = R"(
            // 有循环依赖的代码
            void withDependency(float* a, int n) {
                for (int i = 1; i < n; i++) {
                    // 真依赖：a[i] 依赖于 a[i-1]
                    a[i] = a[i-1] * 2.0f + a[i];
                }
            }
            // 消除依赖后的代码
            void withoutDependency(float* a, int n) {
                // 使用临时变量打破依赖链
                float prev = a[0];
                for (int i = 1; i < n; i++) {
                    float current = a[i];
                    a[i] = prev * 2.0f + current;
                    prev = current; // 更新用于下一次迭代
                }
            }
            // 或者重新设计算法
            void alternativeApproach(float* a, int n) {
                // 如果允许，可以完全并行计算
                std::vector<float> temp(n);
                #pragma omp parallel for
                for (int i = 1; i < n; i++) {
                    temp[i] = a[i-1] * 2.0f;
                }
                #pragma omp parallel for
                for (int i = 1; i < n; i++) {
                    a[i] += temp[i];
                }
            }
        )";
        std::cout << dependencyCode << std::endl;
    }
};

int main() {
    // 创建处理器配置
    MachineParallelismAnalyzer::ProcessorConfig config;
    config.issueWidth = 4;
    config.aluUnits = 3;
    config.loadStoreUnits = 2;
    config.branchUnits = 1;
    MachineParallelismAnalyzer analyzer(config);
    // 测试程序
    std::vector<std::string> testProgram = {
        "LOAD R1, [R10]",
        "LOAD R2, [R11]",
        "ADD R3, R1, R2", // 依赖 LOAD 结果
        "MUL R4, R3, R1", // 依赖 ADD 结果
        "STORE R4, [R12]",
        "ADD R5, R6, R7", // 独立指令
        "SUB R8, R9, R10", // 独立指令
        "BRANCH LOOP_END"
    };
    analyzer.AnalyzeILP(testProgram);
    ParallelOptimizationExample::DemonstrateOptimizations();
    return 0;
}

15.2.2 指令发射策略详解

指令发射策略是超标量处理器的核心设计决策之一，它决定了处理器如何在多个执行单元之间调度指令。

class InstructionIssuePolicy:
    """指令发射策略模拟器"""
    def __init__(self, policy_name="in_order"):
        self.policy_name = policy_name
        self.instruction_queue = []
        self.execution_units = []
        self.issue_history = []

    def add_instruction(self, instruction):
        """添加指令到队列"""
        self.instruction_queue.append(instruction)

    def add_execution_unit(self, unit_type, latency):
        """添加执行单元"""
        self.execution_units.append({'type': unit_type, 'latency': latency, 'busy_until': 0, 'current_instr': None})

    def simulate_issue(self, cycles=10):
        """模拟指令发射过程"""
        print(f"\n模拟指令发射策略：{self.policy_name}")
        print("指令队列：", [f"Instr{i}" for i in range(len(self.instruction_queue))])
        current_cycle = 0
        while current_cycle < cycles and (self.instruction_queue or any(u['current_instr'] is not None for u in self.execution_units)):
            current_cycle += 1
            print(f"\n周期 {current_cycle}:")
            # 更新执行单元状态
            self._update_execution_units(current_cycle)
            # 根据策略发射指令
            if self.policy_name == "in_order":
                self._issue_in_order(current_cycle)
            elif self.policy_name == "out_of_order":
                self._issue_out_of_order(current_cycle)
            elif self.policy_name == "scoreboard":
                self._issue_with_scoreboard(current_cycle)
            elif self.policy_name == "tomasulo":
                self._issue_with_tomasulo(current_cycle)
            # 显示当前状态
            self._display_status(current_cycle)

    def _update_execution_units(self, current_cycle):
        """更新执行单元状态"""
        for unit in self.execution_units:
            if unit['current_instr'] is not None:
                # 检查指令是否完成
                start_cycle = unit['current_instr']['start_cycle']
                if current_cycle >= start_cycle + unit['latency']:
                    print(f" 执行单元 {unit['type']}: 指令{unit['current_instr']['id']} 完成")
                    unit['current_instr'] = None
                    unit['busy_until'] = 0

    def _issue_in_order(self, current_cycle):
        """顺序发射策略"""
        if not self.instruction_queue:
            return
        for unit in self.execution_units:
            if unit['current_instr'] is None and self.instruction_queue:
                # 发射队列中的第一条指令
                instr_id = self.instruction_queue.pop(0)
                unit['current_instr'] = {'id': instr_id, 'start_cycle': current_cycle}
                unit['busy_until'] = current_cycle + unit['latency']
                print(f" 顺序发射：指令{instr_id} -> {unit['type']}单元")
                self.issue_history.append({'cycle': current_cycle, 'instr': instr_id, 'unit': unit['type'], 'policy': 'in_order'})
                break

    def _issue_out_of_order(self, current_cycle):
        """乱序发射策略"""
        if not self.instruction_queue:
            return
        # 检查所有执行单元
        for unit in self.execution_units:
            if unit['current_instr'] is None and self.instruction_queue:
                # 发射第一条可用的指令
                instr_id = self.instruction_queue.pop(0)
                unit['current_instr'] = {'id': instr_id, 'start_cycle': current_cycle}
                unit['busy_until'] = current_cycle + unit['latency']
                print(f" 乱序发射：指令{instr_id} -> {unit['type']}单元")
                self.issue_history.append({'cycle': current_cycle, 'instr': instr_id, 'unit': unit['type'], 'policy': 'out_of_order'})

    def _issue_with_scoreboard(self, current_cycle):
        """记分牌发射策略"""
        # 简化的记分牌算法
        if not self.instruction_queue:
            return
        # 检查指令间的依赖
        available_units = [u for u in self.execution_units if u['current_instr'] is None]
        for unit in available_units:
            if self.instruction_queue:
                # 检查是否有数据冒险
                instr_id = self.instruction_queue[0]
                # 简化的依赖检查
                can_issue = True
                for other_unit in self.execution_units:
                    if (other_unit['current_instr'] is not None and other_unit['current_instr']['id'] == instr_id - 1):
                        # 前一条指令还在执行，存在依赖
                        can_issue = False
                        print(f" 记分牌：指令{instr_id} 等待指令{instr_id-1} 完成")
                        break
                if can_issue:
                    instr_id = self.instruction_queue.pop(0)
                    unit['current_instr'] = {'id': instr_id, 'start_cycle': current_cycle}
                    unit['busy_until'] = current_cycle + unit['latency']
                    print(f" 记分牌发射：指令{instr_id} -> {unit['type']}单元")
                    self.issue_history.append({'cycle': current_cycle, 'instr': instr_id, 'unit': unit['type'], 'policy': 'scoreboard'})

    def _issue_with_tomasulo(self, current_cycle):
        """Tomasulo 算法发射策略"""
        # 简化的 Tomasulo 算法
        if not self.instruction_queue:
            return
        # 检查保留站状态
        available_units = [u for u in self.execution_units if u['current_instr'] is None]
        for unit in available_units:
            if self.instruction_queue:
                instr_id = self.instruction_queue[0]
                # Tomasulo 算法的关键：寄存器重命名和保留站
                # 这里简化处理
                can_issue = True
                # 检查操作数是否就绪
                if instr_id > 0:
                    # 检查前一条指令是否完成
                    for other_unit in self.execution_units:
                        if (other_unit['current_instr'] is not None and other_unit['current_instr']['id'] == instr_id - 1):
                            # 操作数未就绪
                            can_issue = False
                            # 但 Tomasulo 算法可以重命名寄存器来避免等待
                            print(f" Tomasulo: 指令{instr_id} 操作数未就绪，但可以重命名")
                            can_issue = True
                            # 模拟重命名成功
                            break
                if can_issue:
                    instr_id = self.instruction_queue.pop(0)
                    unit['current_instr'] = {'id': instr_id, 'start_cycle': current_cycle}
                    unit['busy_until'] = current_cycle + unit['latency']
                    print(f" Tomasulo 发射：指令{instr_id} -> {unit['type']}单元")
                    self.issue_history.append({'cycle': current_cycle, 'instr': instr_id, 'unit': unit['type'], 'policy': 'tomasulo'})

    def _display_status(self, current_cycle):
        """显示当前状态"""
        print(" 执行单元状态:")
        for unit in self.execution_units:
            if unit['current_instr'] is not None:
                remaining = unit['busy_until'] - current_cycle
                print(f" {unit['type']}: 执行指令{unit['current_instr']['id']}, " f"剩余{remaining}周期")
            else:
                print(f" {unit['type']}: 空闲")
        if self.instruction_queue:
            print(f" 指令队列剩余：{len(self.instruction_queue)}条")

    def analyze_performance(self):
        """分析性能"""
        print(f"\n=== {self.policy_name}策略性能分析 ===")
        if not self.issue_history:
            print("没有发射历史")
            return
        total_instructions = len(self.issue_history)
        cycles = max([h['cycle'] for h in self.issue_history])
        print(f"总发射指令数：{total_instructions}")
        print(f"总周期数：{cycles}")
        if cycles > 0:
            ipc = total_instructions / cycles
            print(f"IPC: {ipc:.2f}")
        # 统计执行单元利用率
        print("\n执行单元利用率:")
        for unit in self.execution_units:
            busy_cycles = sum(1 for h in self.issue_history if h['unit'] == unit['type'])
            utilization = busy_cycles / cycles if cycles > 0 else 0
            print(f" {unit['type']}: {utilization:.1%}")

def compare_issue_policies():
    """比较不同的指令发射策略"""
    print("=== 指令发射策略对比 ===")
    # 创建测试场景
    test_instructions = list(range(10))  # 10 条指令
    policies = ['in_order', 'out_of_order', 'scoreboard', 'tomasulo']
    results = []
    for policy in policies:
        print(f"\n{'='*50}")
        print(f"测试策略：{policy}")
        print('='*50)
        # 创建模拟器
        simulator = InstructionIssuePolicy(policy)
        # 添加指令
        for instr_id in test_instructions:
            simulator.add_instruction(instr_id)
        # 添加执行单元
        simulator.add_execution_unit('ALU1', 2)
        simulator.add_execution_unit('ALU2', 2)
        simulator.add_execution_unit('MEM', 3)
        simulator.add_execution_unit('BRANCH', 1)
        # 运行模拟
        simulator.simulate_issue(cycles=15)
        # 分析性能
        simulator.analyze_performance()
        # 收集结果
        if simulator.issue_history:
            cycles = max([h['cycle'] for h in simulator.issue_history])
            ipc = len(simulator.issue_history) / cycles
            results.append({'policy': policy, 'cycles': cycles, 'ipc': ipc, 'instructions': len(simulator.issue_history)})
    # 比较结果
    print("\n" + "="*60)
    print("策略对比总结:")
    print("="*60)
    print(f"{'策略':<15}{'指令数':<10}{'周期数':<10}{'IPC':<10}{'效率':<10}")
    print("-"*60)
    best_ipc = max(r['ipc'] for r in results)
    for result in results:
        efficiency = result['ipc'] / best_ipc * 100
        print(f"{result['policy']:<15}{result['instructions']:<10} " f"{result['cycles']:<10}{result['ipc']:<10.2f}{efficiency:<9.1f}%")
    print("\n策略特点:")
    print("1. 顺序发射 (in_order):")
    print(" • 简单，硬件开销小")
    print(" • 遇到依赖或资源冲突时效率低")
    print(" • 早期 RISC 处理器常用")
    print("\n2. 乱序发射 (out_of_order):")
    print(" • 可以绕过停顿的指令")
    print(" • 提高执行单元利用率")
    print(" • 需要更复杂的控制逻辑")
    print("\n3. 记分牌 (scoreboard):")
    print(" • 动态调度指令")
    print(" • 检测和解决数据冒险")
    print(" • CDC 6600 首次使用")
    print("\n4. Tomasulo 算法:")
    print(" • 支持寄存器重命名")
    print(" • 消除 WAR 和 WAW 冒险")
    print(" • IBM 360/91 首次使用")
    print(" • 现代超标量处理器的基础")

class RealWorldExample:
    """现实世界处理器示例"""
    @staticmethod
    def analyze_modern_processors():
        """分析现代处理器的发射策略"""
        print("\n=== 现代处理器发射策略实例 ===")
        processors = {
            'Intel Core i9-13900K': {
                'architecture': 'x86-64',
                'issue_width': 6,
                'dispatch_width': 6,
                'retire_width': 8,
                'reorder_buffer': 512,
                'reservation_stations': 97,
                'key_features': ['Hybrid Architecture (P-cores + E-cores)', 'Deep Out-of-Order Execution', 'Advanced Branch Prediction', 'Intel Thread Director']
            },
            'AMD Ryzen 9 7950X': {
                'architecture': 'x86-64',
                'issue_width': 6,
                'dispatch_width': 6,
                'retire_width': 8,
                'reorder_buffer': 256,
                'reservation_stations': 192,
                'key_features': ['Zen 4 Architecture', 'Large Unified L3 Cache', 'Advanced Power Management', 'AVX-512 Support']
            },
            'Apple M2 Max': {
                'architecture': 'ARMv8.5-A',
                'issue_width': 8,
                'dispatch_width': 8,
                'retire_width': 8,
                'reorder_buffer': 630,
                'reservation_stations': 'Unified',
                'key_features': ['ARMv8.5-A with Apple Extensions', 'Unified Memory Architecture', 'High Performance Cores + Efficiency Cores', 'Neural Engine']
            },
            'ARM Cortex-X3': {
                'architecture': 'ARMv9-A',
                'issue_width': 6,
                'dispatch_width': 10,
                'retire_width': 8,
                'reorder_buffer': 320,
                'reservation_stations': 'Multiple',
                'key_features': ['ARMv9-A Architecture', 'SVE2 Support', 'Advanced Branch Prediction', 'Memory Tagging Extension']
            }
        }
        print("\n现代处理器发射能力对比:")
        print(f"{'处理器':<25}{'发射宽度':<10}{'重排序缓冲':<15}{'关键特性'}")
        print("-"*80)
        for name, specs in processors.items():
            features = ', '.join(specs['key_features'][:2])
            print(f"{name:<25}{specs['issue_width']:<10}{specs['reorder_buffer']:<15}{features}")
        print("\n发展趋势:")
        print("1. 更宽的发射宽度：从 4 发射到 8 发射甚至更宽")
        print("2. 更深的乱序执行窗口：更大的 ROB 和保留站")
        print("3. 更智能的分支预测：减少控制冒险的影响")
        print("4. 更好的能效：异构计算和精细功耗管理")
        print("5. 专用加速器：集成 AI、媒体等专用处理单元")

    @staticmethod
    def programming_implications():
        """编程启示"""
        print("\n=== 对程序员的启示 ===")
        print("\n1. 编写有利于并行的代码:")
        print(" • 减少不必要的依赖")
        print(" • 使用局部变量而不是全局变量")
        print(" • 避免过长的依赖链")
        print("\n2. 利用现代处理器的特性:")
        print(" • 使用 SIMD 指令进行向量化")
        print(" • 合理使用预取指令")
        print(" • 考虑缓存友好性")
        print("\n3. 性能优化技巧:")
        code_examples = """ // 技巧 1: 循环展开
        for (int i = 0; i < n; i += 4) {
            result[i] = a[i] * b[i];
            result[i+1] = a[i+1] * b[i+1];
            result[i+2] = a[i+2] * b[i+2];
            result[i+3] = a[i+3] * b[i+3];
        }
        // 技巧 2: 数据预取
        for (int i = 0; i < n; i += 16) {
            _mm_prefetch(&a[i + 32], _MM_HINT_T0);
            _mm_prefetch(&b[i + 32], _MM_HINT_T0);
            // 处理当前数据块
            for (int j = i; j < i + 16; j++) {
                result[j] = a[j] * b[j];
            }
        }
        // 技巧 3: 减少分支
        // 不好：很多分支
        for (int i = 0; i < n; i++) {
            if (data[i] > threshold) {
                result[i] = processHigh(data[i]);
            } else {
                result[i] = processLow(data[i]);
            }
        }
        // 好：减少分支
        for (int i = 0; i < n; i++) {
            bool isHigh = data[i] > threshold;
            result[i] = isHigh ? processHigh(data[i]) : processLow(data[i]);
        }
        // 更好：完全消除分支
        for (int i = 0; i < n; i++) {
            float highResult = processHigh(data[i]);
            float lowResult = processLow(data[i]);
            float weight = (data[i] > threshold) ? 1.0f : 0.0f;
            result[i] = weight * highResult + (1.0f - weight) * lowResult;
        } """
        print(code_examples)

if __name__ == "__main__":
    compare_issue_policies()
    RealWorldExample.analyze_modern_processors()
    RealWorldExample.programming_implications()

15.2.3 寄存器重命名技术

寄存器重命名是解决假数据依赖（WAR 和 WAW 冒险）的关键技术，它通过使用物理寄存器来替代架构寄存器，从而实现更高的指令级并行性。

#include <iostream>
#include <vector>
#include <map>
#include <queue>
#include <string>

class RegisterRenamingUnit {
private:
    // 架构寄存器数量
    static const int ARCH_REG_COUNT = 32;
    // 物理寄存器数量（通常比架构寄存器多）
    static const int PHYS_REG_COUNT = 64;
    // 架构寄存器到物理寄存器的映射
    std::vector<int> archToPhysMap;
    // 物理寄存器的状态
    struct PhysicalRegister {
        bool allocated; // 是否已分配
        bool ready;     // 值是否就绪
        int value;      // 寄存器值（模拟）
        int renameCycle;// 重命名时的周期
        PhysicalRegister() : allocated(false), ready(false), value(0), renameCycle(0) {}
    };
    std::vector<PhysicalRegister> physRegs;
    // 空闲物理寄存器列表
    std::queue<int> freePhysRegs;
    // 重命名表历史（用于异常恢复）
    struct RenameHistory {
        int archReg;
        int oldPhysReg;
        int cycle;
        RenameHistory(int arch, int oldPhys, int c) : archReg(arch), oldPhysReg(oldPhys), cycle(c) {}
    };
    std::vector<RenameHistory> renameHistory;
    // 统计信息
    int totalRenames;
    int wawResolved;
    int warResolved;
public:
    RegisterRenamingUnit() : totalRenames(0), wawResolved(0), warResolved(0) {
        // 初始化映射表
        archToPhysMap.resize(ARCH_REG_COUNT);
        // 初始化物理寄存器
        physRegs.resize(PHYS_REG_COUNT);
        // 初始化空闲列表
        for (int i = ARCH_REG_COUNT; i < PHYS_REG_COUNT; i++) {
            freePhysRegs.push(i);
            physRegs[i].allocated = false;
            physRegs[i].ready = true; // 空闲寄存器被认为是就绪的
        }
        // 前 ARCH_REG_COUNT 个物理寄存器映射到架构寄存器
        for (int i = 0; i < ARCH_REG_COUNT; i++) {
            archToPhysMap[i] = i;
            physRegs[i].allocated = true;
            physRegs[i].ready = true;
            physRegs[i].value = 0; // 初始值
        }
        std::cout << "寄存器重命名单元初始化完成" << std::endl;
        std::cout << " 架构寄存器：" << ARCH_REG_COUNT << std::endl;
        std::cout << " 物理寄存器：" << PHYS_REG_COUNT << std::endl;
        std::cout << " 空闲物理寄存器：" << freePhysRegs.size() << std::endl;
    }
    // 重命名操作：为指令分配物理寄存器
    int RenameRegister(int archReg, bool isWrite, int currentCycle) {
        if (archReg < 0 || archReg >= ARCH_REG_COUNT) return -1; // 无效寄存器
        int currentPhysReg = archToPhysMap[archReg];
        if (isWrite) {
            // 写入操作：需要分配新的物理寄存器
            // 检查 WAW 冒险：如果架构寄存器最近被写过，需要解决
            bool wawHazard = CheckWAWHazard(archReg, currentCycle);
            if (wawHazard) {
                wawResolved++;
                std::cout << " 检测到 WAW 冒险，通过重命名解决" << std::endl;
            }
            // 分配新的物理寄存器
            if (freePhysRegs.empty()) {
                std::cout << " 错误：没有可用的物理寄存器" << std::endl;
                return -1;
            }
            int newPhysReg = freePhysRegs.front();
            freePhysRegs.pop();
            // 保存历史记录（用于恢复）
            renameHistory.emplace_back(archReg, currentPhysReg, currentCycle);
            // 更新映射
            archToPhysMap[archReg] = newPhysReg;
            // 设置新物理寄存器状态
            physRegs[newPhysReg].allocated = true;
            physRegs[newPhysReg].ready = false; // 值还未计算
            physRegs[newPhysReg].renameCycle = currentCycle;
            // 旧物理寄存器现在可以被释放（但需要等待所有使用完成）
            // 在实际实现中，会有更复杂的生命周期管理
            totalRenames++;
            std::cout << " 重命名：架构寄存器 R" << archReg << " -> 物理寄存器 P" << newPhysReg << " (旧：P" << currentPhysReg << ")" << std::endl;
            return newPhysReg;
        } else {
            // 读取操作：返回当前映射的物理寄存器
            // 检查 WAR 冒险
            bool warHazard = CheckWARHazard(archReg, currentCycle);
            if (warHazard) {
                warResolved++;
                std::cout << " 检测到 WAR 冒险，通过重命名避免" << std::endl;
            }
            std::cout << " 读取：架构寄存器 R" << archReg << " -> 物理寄存器 P" << currentPhysReg << std::endl;
            return currentPhysReg;
        }
    }
    bool CheckWAWHazard(int archReg, int currentCycle) {
        // 简化的 WAW 冒险检测
        // 检查这个架构寄存器最近是否被重命名过
        for (const auto& history : renameHistory) {
            if (history.archReg == archReg && (currentCycle - history.cycle) < 5) return true;
        }
        return false;
    }
    bool CheckWARHazard(int archReg, int currentCycle) {
        // 简化的 WAR 冒险检测
        // 检查是否有未完成的写入操作
        int physReg = archToPhysMap[archReg];
        if (!physRegs[physReg].ready) { // 寄存器值未就绪，说明有正在进行的写入
            return true;
        }
        return false;
    }
    // 标记物理寄存器就绪（值已计算）
    void MarkRegisterReady(int physReg, int value) {
        if (physReg >= 0 && physReg < PHYS_REG_COUNT) {
            physRegs[physReg].ready = true;
            physRegs[physReg].value = value;
            std::cout << " 物理寄存器 P" << physReg << " 就绪，值 = " << value << std::endl;
        }
    }
    // 提交操作：更新架构状态
    void CommitInstruction(int archReg, int physReg, int currentCycle) {
        // 在实际处理器中，提交时会更新架构状态
        // 这里简化处理：只是记录提交
        std::cout << " 提交：架构寄存器 R" << archReg << " = 物理寄存器 P" << physReg << " 的值 " << physRegs[physReg].value << std::endl;
        // 释放旧的物理寄存器（如果存在）
        ReleaseOldRegisters(archReg, currentCycle);
    }
    void ReleaseOldRegisters(int archReg, int currentCycle) {
        // 查找这个架构寄存器最近使用的旧物理寄存器
        for (auto it = renameHistory.begin(); it != renameHistory.end(); ++it) {
            if (it->archReg == archReg) {
                // 假设在提交后可以释放旧的物理寄存器
                int oldPhysReg = it->oldPhysReg;
                // 确保没有指令在使用这个物理寄存器
                if (CanReleaseRegister(oldPhysReg, currentCycle)) {
                    physRegs[oldPhysReg].allocated = false;
                    physRegs[oldPhysReg].ready = true;
                    freePhysRegs.push(oldPhysReg);
                    std::cout << " 释放物理寄存器 P" << oldPhysReg << std::endl;
                    renameHistory.erase(it);
                    break;
                }
            }
        }
    }
    bool CanReleaseRegister(int physReg, int currentCycle) {
        // 简化的检查：寄存器是否已经就绪一段时间
        if (physRegs[physReg].ready && (currentCycle - physRegs[physReg].renameCycle) > 10) return true;
        return false;
    }
    // 显示当前状态
    void DisplayStatus() {
        std::cout << "\n寄存器重命名单元状态:" << std::endl;
        std::cout << "架构寄存器映射:" << std::endl;
        for (int i = 0; i < ARCH_REG_COUNT; i += 8) {
            std::cout << " R" << i << "-R" << i + 7 << ": ";
            for (int j = 0; j < 8 && i + j < ARCH_REG_COUNT; j++) {
                std::cout << "P" << archToPhysMap[i + j] << " ";
            }
            std::cout << std::endl;
        }
        std::cout << "\n物理寄存器状态 (前 16 个):" << std::endl;
        for (int i = 0; i < 16; i += 4) {
            std::cout << " ";
            for (int j = 0; j < 4; j++) {
                int idx = i + j;
                std::cout << "P" << idx << ":";
                if (physRegs[idx].allocated) {
                    std::cout << (physRegs[idx].ready ? "就绪" : "未就绪");
                    std::cout << "(" << physRegs[idx].value << ") ";
                } else {
                    std::cout << "空闲 ";
                }
            }
            std::cout << std::endl;
        }
        std::cout << "\n空闲物理寄存器：" << freePhysRegs.size() << std::endl;
        std::cout << "总重命名次数：" << totalRenames << std::endl;
        std::cout << "解决的 WAW 冒险：" << wawResolved << std::endl;
        std::cout << "解决的 WAR 冒险：" << warResolved << std::endl;
    }
};

class SuperscalarProcessorWithRenaming {
private:
    RegisterRenamingUnit renamingUnit;
    // 模拟的指令
    struct Instruction {
        int id;
        std::string opcode;
        int destReg; // 目标寄存器（架构寄存器编号）
        int srcReg1; // 源寄存器 1
        int srcReg2; // 源寄存器 2
        int immediate; // 立即数
        // 重命名后的物理寄存器
        int physDestReg;
        int physSrcReg1;
        int physSrcReg2;
        bool renamed;
        bool executed;
        bool committed;
        Instruction(int i, const std::string& op, int dst, int src1, int src2, int imm) : id(i), opcode(op), destReg(dst), srcReg1(src1), srcReg2(src2), immediate(imm), renamed(false), executed(false), committed(false) {
            physDestReg = -1;
            physSrcReg1 = -1;
            physSrcReg2 = -1;
        }
    };
    std::vector<Instruction> instructionQueue;
    std::vector<Instruction> executedInstructions;
    int currentCycle;
public:
    SuperscalarProcessorWithRenaming() : currentCycle(0) {
        std::cout << "带寄存器重命名的超标量处理器初始化" << std::endl;
    }
    void AddInstruction(const std::string& opcode, int dst, int src1, int src2, int imm) {
        int id = instructionQueue.size();
        instructionQueue.emplace_back(id, opcode, dst, src1, src2, imm);
        std::cout << "添加指令" << id << ": " << opcode << " R" << dst << ", R" << src1 << ", R" << src2 << ", #" << imm << std::endl;
    }
    void RunSimulation(int cycles) {
        std::cout << "\n开始模拟执行..." << std::endl;
        for (currentCycle = 1; currentCycle <= cycles; currentCycle++) {
            std::cout << "\n=== 周期 " << currentCycle << " ===" << std::endl;
            // 阶段 1: 重命名
            RenameStage();
            // 阶段 2: 执行
            ExecuteStage();
            // 阶段 3: 提交
            CommitStage();
            // 显示状态
            if (currentCycle % 3 == 0) renamingUnit.DisplayStatus();
            // 检查是否完成所有指令
            if (AllInstructionsCommitted()) {
                std::cout << "\n所有指令已提交，模拟完成" << std::endl;
                break;
            }
        }
        PrintStatistics();
    }
    void RenameStage() {
        std::cout << "重命名阶段:" << std::endl;
        // 每次重命名最多 2 条指令（模拟发射宽度）
        int renameCount = 0;
        for (auto& instr : instructionQueue) {
            if (!instr.renamed && renameCount < 2) {
                // 重命名源寄存器
                if (instr.srcReg1 >= 0) {
                    instr.physSrcReg1 = renamingUnit.RenameRegister(instr.srcReg1, false, currentCycle);
                }
                if (instr.srcReg2 >= 0) {
                    instr.physSrcReg2 = renamingUnit.RenameRegister(instr.srcReg2, false, currentCycle);
                }
                // 重命名目标寄存器
                if (instr.destReg >= 0) {
                    instr.physDestReg = renamingUnit.RenameRegister(instr.destReg, true, currentCycle);
                }
                instr.renamed = true;
                renameCount++;
                std::cout << " 指令" << instr.id << " 重命名完成" << std::endl;
            }
        }
    }
    void ExecuteStage() {
        std::cout << "执行阶段:" << std::endl;
        // 检查已重命名但未执行的指令
        for (auto& instr : instructionQueue) {
            if (instr.renamed && !instr.executed) {
                // 简化的执行：计算一个值
                int result = instr.id * 10 + 5; // 模拟计算结果
                // 标记目标寄存器就绪
                if (instr.physDestReg >= 0) renamingUnit.MarkRegisterReady(instr.physDestReg, result);
                instr.executed = true;
                executedInstructions.push_back(instr);
                std::cout << " 执行指令" << instr.id << ": " << instr.opcode << " -> 结果 = " << result << std::endl;
            }
        }
    }
    void CommitStage() {
        std::cout << "提交阶段:" << std::endl;
        // 按顺序提交已执行的指令
        for (auto& instr : executedInstructions) {
            if (!instr.committed) {
                renamingUnit.CommitInstruction(instr.destReg, instr.physDestReg, currentCycle);
                instr.committed = true;
                std::cout << " 提交指令" << instr.id << std::endl;
                break; // 每周期提交一条指令
            }
        }
    }
    bool AllInstructionsCommitted() {
        for (const auto& instr : instructionQueue) {
            if (!instr.committed) return false;
        }
        return true;
    }
    void PrintStatistics() {
        std::cout << "\n=== 模拟统计 ===" << std::endl;
        int totalInstructions = instructionQueue.size();
        std::cout << "总指令数：" << totalInstructions << std::endl;
        std::cout << "总周期数：" << currentCycle << std::endl;
        if (currentCycle > 0) {
            float ipc = static_cast<float>(totalInstructions) / currentCycle;
            std::cout << "平均 IPC: " << ipc << std::endl;
        }
        // 分析并行性
        int maxParallel = 0;
        int currentParallel = 0;
        for (const auto& instr : instructionQueue) {
            if (instr.renamed && !instr.committed) {
                currentParallel++;
                maxParallel = std::max(maxParallel, currentParallel);
            }
            if (instr.committed) currentParallel--;
        }
        std::cout << "最大同时活跃指令数：" << maxParallel << std::endl;
        std::cout << "指令级并行度：" << (maxParallel * 1.0f) << std::endl;
    }
};

void DemonstrateHazardsWithoutRenaming() {
    std::cout << "=== 没有寄存器重命名时的冒险问题 ===" << std::endl;
    std::cout << "\n示例代码序列:" << std::endl;
    std::cout << "1: ADD R1, R2, R3 # R1 = R2 + R3" << std::endl;
    std::cout << "2: MUL R4, R1, R5 # R4 = R1 * R5 (RAW 依赖：需要 R1)" << std::endl;
    std::cout << "3: ADD R1, R6, R7 # R1 = R6 + R7 (WAW 冒险：再次写入 R1)" << std::endl;
    std::cout << "4: SUB R8, R1, R9 # R8 = R1 - R9 (WAR 冒险：使用 R1，但前面在写 R1)" << std::endl;
    std::cout << "\n问题分析:" << std::endl;
    std::cout << "• 指令 2 和指令 3 之间的 WAW 冒险：都写入 R1" << std::endl;
    std::cout << "• 指令 3 和指令 4 之间的 WAR 冒险：指令 3 写 R1，指令 4 读 R1" << std::endl;
    std::cout << "• 没有重命名时，处理器必须等待，导致性能下降" << std::endl;
}

void DemonstrateHazardsWithRenaming() {
    std::cout << "\n=== 使用寄存器重命名解决冒险 ===" << std::endl;
    std::cout << "\n相同的代码序列，但使用寄存器重命名:" << std::endl;
    std::cout << "1: ADD P1, P2, P3 # P1 = P2 + P3 (R1 重命名为 P1)" << std::endl;
    std::cout << "2: MUL P4, P1, P5 # P4 = P1 * P5 (无 RAW 冒险，P1 已就绪)" << std::endl;
    std::cout << "3: ADD P10, P6, P7 # P10 = P6 + P7 (R1 再次重命名为 P10，避免 WAW)" << std::endl;
    std::cout << "4: SUB P8, P1, P9 # P8 = P1 - P9 (读 P1，与写 P10 无 WAR 冒险)" << std::endl;
    std::cout << "\n解决方案:" << std::endl;
    std::cout << "• WAW 冒险：为 R1 的每次写入分配不同的物理寄存器" << std::endl;
    std::cout << "• WAR 冒险：读写不同的物理寄存器，无冲突" << std::endl;
    std::cout << "• RAW 冒险：仍然存在，但可以通过乱序执行优化" << std::endl;
    std::cout << "\n性能提升:" << std::endl;
    std::cout << "• 指令 3 无需等待指令 2 完成" << std::endl;
    std::cout << "• 指令 4 可以更早执行" << std::endl;
    std::cout << "• 整体 IPC 提高" << std::endl;
}

int main() {
    // 演示冒险问题
    DemonstrateHazardsWithoutRenaming();
    DemonstrateHazardsWithRenaming();
    // 创建并运行处理器模拟
    std::cout << "\n\n=== 寄存器重命名模拟 ===" << std::endl;
    SuperscalarProcessorWithRenaming processor;
    // 添加一个有冒险的指令序列
    processor.AddInstruction("ADD", 1, 2, 3, 0); // R1 = R2 + R3
    processor.AddInstruction("MUL", 4, 1, 5, 0); // R4 = R1 * R5 (依赖指令 1)
    processor.AddInstruction("ADD", 1, 6, 7, 0); // R1 = R6 + R7 (WAW 冒险)
    processor.AddInstruction("SUB", 8, 1, 9, 0); // R8 = R1 - R9 (WAR 冒险)
    processor.AddInstruction("DIV", 10, 11, 12, 0); // 独立指令
    processor.AddInstruction("AND", 13, 14, 15, 0); // 独立指令
    // 运行模拟
    processor.RunSimulation(15);
    return 0;
}

15.2.4 机器并行性实现技术

机器并行性是指处理器硬件能够同时执行多条指令的能力。实现机器并行性需要多种技术的配合，包括多发射、乱序执行、推测执行等。

import sys
from typing import List, Dict, Tuple
from collections import deque

class MachineParallelismImplementation:
    """机器并行性实现模拟"""
    def __init__(self):
        # 处理器配置
        self.config = {
            'fetch_width': 4, # 取指宽度
            'decode_width': 4, # 译码宽度
            'issue_width': 4, # 发射宽度
            'commit_width': 4, # 提交宽度
            'alu_units': 2, # ALU 单元数
            'mem_units': 2, # 内存单元数
            'fp_units': 1, # 浮点单元数
            'rob_size': 128, # 重排序缓冲大小
            'lq_size': 48, # 加载队列大小
            'sq_size': 32, # 存储队列大小
            'phys_regs': 168 # 物理寄存器数
        }
        # 流水线阶段
        self.pipeline_stages = {
            'fetch': deque(), 'decode': deque(), 'rename': deque(),
            'dispatch': deque(), 'issue': deque(), 'execute': deque(),
            'writeback': deque(), 'commit': deque()
        }
        # 执行单元
        self.execution_units = {
            'alu0': {'type': 'alu', 'latency': 1, 'busy_until': 0, 'instr': None},
            'alu1': {'type': 'alu', 'latency': 1, 'busy_until': 0, 'instr': None},
            'mem0': {'type': 'mem', 'latency': 3, 'busy_until': 0, 'instr': None},
            'mem1': {'type': 'mem', 'latency': 3, 'busy_until': 0, 'instr': None},
            'fpu0': {'type': 'fpu', 'latency': 4, 'busy_until': 0, 'instr': None}
        }
        # 关键数据结构
        self.reorder_buffer = [] # 重排序缓冲
        self.load_queue = [] # 加载队列
        self.store_queue = [] # 存储队列
        self.reservation_stations = {
            'alu': [], # ALU 保留站
            'mem': [], # 内存保留站
            'fpu': [] # 浮点保留站
        }
        # 寄存器重命名表
        self.rename_table = [i for i in range(32)] # 初始映射
        self.free_phys_regs = list(range(32, self.config['phys_regs']))
        # 统计信息
        self.stats = {
            'cycles': 0, 'instructions': 0, 'fetched': 0, 'decoded': 0,
            'issued': 0, 'executed': 0, 'committed': 0,
            'stalls': {'fetch': 0, 'decode': 0, 'rename': 0, 'dispatch': 0, 'issue': 0}
        }

    def simulate_cycle(self):
        """模拟一个时钟周期"""
        self.stats['cycles'] += 1
        print(f"\n=== 周期 {self.stats['cycles']} ===")
        # 反向推进流水线（从后往前，避免数据覆盖）
        self.commit_stage()
        self.writeback_stage()
        self.execute_stage()
        self.issue_stage()
        self.dispatch_stage()
        self.rename_stage()
        self.decode_stage()
        self.fetch_stage()
        # 显示状态
        self.display_status()

    def fetch_stage(self):
        """取指阶段"""
        print("取指阶段:")
        # 模拟指令缓存访问
        fetch_count = min(self.config['fetch_width'], 4) # 假设缓存行有 4 条指令
        for i in range(fetch_count):
            if len(self.pipeline_stages['fetch']) < 10: # 限制队列大小
                instr_id = self.stats['fetched']
                self.pipeline_stages['fetch'].append({'id': instr_id, 'pc': 0x1000 + instr_id * 4, 'raw_instr': f"INSTR_{instr_id}"})
                self.stats['fetched'] += 1
                print(f" 取指指令{instr_id} (PC: 0x{0x1000+ instr_id *4:08x})")
            else:
                self.stats['stalls']['fetch'] += 1
                print(" 取指停顿：队列满")
                break

    def decode_stage(self):
        """译码阶段"""
        print("译码阶段:")
        decode_count = 0
        while (self.pipeline_stages['fetch'] and decode_count < self.config['decode_width']):
            instr = self.pipeline_stages['fetch'].popleft()
            # 简化的译码：确定指令类型
            if 'ADD' in instr['raw_instr'] or 'SUB' in instr['raw_instr']:
                instr['type'] = 'alu'
                instr['latency'] = 1
            elif 'LOAD' in instr['raw_instr']:
                instr['type'] = 'mem'
                instr['latency'] = 3
            elif 'FADD' in instr['raw_instr']:
                instr['type'] = 'fpu'
                instr['latency'] = 4
            else:
                instr['type'] = 'alu'
                instr['latency'] = 1
            self.pipeline_stages['decode'].append(instr)
            self.stats['decoded'] += 1
            decode_count += 1
            print(f" 译码指令{instr['id']} -> 类型：{instr['type']}")
        if decode_count == 0 and len(self.pipeline_stages['fetch']) > 0:
            self.stats['stalls']['decode'] += 1
            print(" 译码停顿：无指令可用")

    def rename_stage(self):
        """重命名阶段"""
        print("重命名阶段:")
        rename_count = 0
        while (self.pipeline_stages['decode'] and rename_count < self.config['issue_width']):
            instr = self.pipeline_stages['decode'].popleft()
            # 简化的寄存器重命名
            # 为指令分配 ROB 条目
            if len(self.reorder_buffer) < self.config['rob_size']:
                rob_entry = {'instr': instr, 'state': 'renamed', 'phys_dest_reg': None, 'result': None, 'exception': False, 'ready': False}
                # 分配物理寄存器（如果是写入操作）
                if instr['type'] in ['alu', 'fpu']:
                    if self.free_phys_regs:
                        rob_entry['phys_dest_reg'] = self.free_phys_regs.pop(0)
                        print(f" 为指令{instr['id']}分配物理寄存器 P{rob_entry['phys_dest_reg']}")
                self.reorder_buffer.append(rob_entry)
                self.pipeline_stages['rename'].append(instr)
                rename_count += 1
                print(f" 重命名指令{instr['id']}，ROB 索引：{len(self.reorder_buffer)-1}")
            else:
                self.stats['stalls']['rename'] += 1
                print(" 重命名停顿：ROB 满")
            # 放回译码队列
            self.pipeline_stages['decode'].appendleft(instr)
            break
        if rename_count == 0 and len(self.pipeline_stages['decode']) > 0:
            self.stats['stalls']['rename'] += 1
            print(" 重命名停顿：无 ROB 空间")

    def dispatch_stage(self):
        """分发阶段（到保留站）"""
        print("分发阶段:")
        dispatch_count = 0
        while (self.pipeline_stages['rename'] and dispatch_count < self.config['issue_width']):
            instr = self.pipeline_stages['rename'].popleft()
            # 分发到相应的保留站
            rs_type = instr['type']
            if len(self.reservation_stations[rs_type]) < 10: # 假设保留站大小
                rs_entry = {'instr': instr, 'op1_ready': True, # 简化：假设操作数都就绪
                            'op2_ready': True, 'scheduled': False}
                self.reservation_stations[rs_type].append(rs_entry)
                self.pipeline_stages['dispatch'].append(instr)
                dispatch_count += 1
                print(f" 分发指令{instr['id']}到{rs_type.upper()}保留站")
            else:
                self.stats['stalls']['dispatch'] += 1
                print(f" 分发停顿：{rs_type.upper()}保留站满")
            # 放回重命名队列
            self.pipeline_stages['rename'].appendleft(instr)
            break
        if dispatch_count == 0 and len(self.pipeline_stages['rename']) > 0:
            self.stats['stalls']['dispatch'] += 1
            print(" 分发停顿：保留站满")

    def issue_stage(self):
        """发射阶段（到执行单元）"""
        print("发射阶段:")
        issue_count = 0
        # 检查所有保留站
        for rs_type, rs_list in self.reservation_stations.items():
            for rs_entry in rs_list:
                if not rs_entry['scheduled'] and issue_count < self.config['issue_width']:
                    # 查找空闲的执行单元
                    for unit_name, unit in self.execution_units.items():
                        if unit['type'] == rs_type and unit['busy_until'] <= self.stats['cycles']:
                            # 发射到执行单元
                            unit['busy_until'] = self.stats['cycles'] + rs_entry['instr']['latency']
                            unit['instr'] = rs_entry['instr']
                            rs_entry['scheduled'] = True
                            self.pipeline_stages['issue'].append(rs_entry['instr'])
                            issue_count += 1
                            self.stats['issued'] += 1
                            print(f" 发射指令{rs_entry['instr']['id']}到{unit_name}")
                            break
                    if issue_count >= self.config['issue_width']: break
        if issue_count >= self.config['issue_width']: break
        if issue_count == 0:
            self.stats['stalls']['issue'] += 1
            print(" 发射停顿：无就绪指令或执行单元忙")

    def execute_stage(self):
        """执行阶段"""
        print("执行阶段:")
        executed_count = 0
        for unit_name, unit in self.execution_units.items():
            if unit['busy_until'] == self.stats['cycles'] and unit['instr']:
                # 执行完成
                instr = unit['instr']
                # 简化的执行：生成结果
                result = instr['id'] * 100 + 42 # 模拟结果
                # 更新 ROB
                for rob_entry in self.reorder_buffer:
                    if rob_entry['instr']['id'] == instr['id']:
                        rob_entry['result'] = result
                        rob_entry['ready'] = True
                        rob_entry['state'] = 'executed'
                        break
                self.pipeline_stages['execute'].append(instr)
                executed_count += 1
                self.stats['executed'] += 1
                print(f" {unit_name}完成指令{instr['id']}，结果={result}")
                # 清空执行单元
                unit['instr'] = None
        if executed_count == 0:
            print(" 无指令完成执行")

    def writeback_stage(self):
        """写回阶段"""
        print("写回阶段:")
        # 检查已执行但未写回的指令
        wb_count = 0
        for instr in self.pipeline_stages['execute']:
            # 写回到 ROB
            self.pipeline_stages['writeback'].append(instr)
            wb_count += 1
            print(f" 写回指令{instr['id']}")
        # 清空执行完成队列
        self.pipeline_stages['execute'].clear()
        if wb_count == 0:
            print(" 无指令写回")

    def commit_stage(self):
        """提交阶段"""
        print("提交阶段:")
        commit_count = 0
        # 按顺序提交 ROB 中的指令
        for rob_entry in self.reorder_buffer[:self.config['commit_width']]:
            if rob_entry['state'] == 'executed' and rob_entry['ready']:
                # 提交指令
                instr = rob_entry['instr']
                # 释放物理寄存器
                if rob_entry['phys_dest_reg']:
                    self.free_phys_regs.append(rob_entry['phys_dest_reg'])
                rob_entry['state'] = 'committed'
                self.pipeline_stages['commit'].append(instr)
                commit_count += 1
                self.stats['committed'] += 1
                print(f" 提交指令{instr['id']}")
            if commit_count >= self.config['commit_width']: break
        # 移除已提交的 ROB 条目
        self.reorder_buffer = [e for e in self.reorder_buffer if e['state'] != 'committed']
        # 清空提交队列
        self.pipeline_stages['commit'].clear()
        if commit_count == 0:
            print(" 无指令提交")

    def display_status(self):
        """显示当前状态"""
        print(f"\n当前状态:")
        print(f" 流水线深度：{sum(len(q) for q in self.pipeline_stages.values())}")
        print(f" ROB 条目：{len(self.reorder_buffer)}/{self.config['rob_size']}")
        # 执行单元状态
        busy_units = []
        for unit_name, unit in self.execution_units.items():
            if unit['instr']:
                busy_units.append(unit_name)
        print(f" 忙的执行单元：{busy_units}")
        # 保留站状态
        for rs_type, rs_list in self.reservation_stations.items():
            scheduled = sum(1 for rs in rs_list if rs['scheduled'])
            print(f" {rs_type.upper()}保留站：{scheduled}/{len(rs_list)} 已调度")

    def run_simulation(self, cycles=20):
        """运行模拟"""
        print("=== 机器并行性实现模拟 ===")
        print(f"配置：{self.config['issue_width']}发射，{self.config['alu_units']}ALU, " f"{self.config['mem_units']}内存，{self.config['fp_units']}浮点")
        for _ in range(cycles):
            self.simulate_cycle()
            # 如果所有指令都处理完成，提前结束
            if (self.stats['fetched'] >= 20 and self.stats['committed'] >= self.stats['fetched']):
                break
        self.print_statistics()

    def print_statistics(self):
        """打印统计信息"""
        print("\n" + "="*60)
        print("模拟统计")
        print("="*60)
        print(f"总周期数：{self.stats['cycles']}")
        print(f"取指指令数：{self.stats['fetched']}")
        print(f"译码指令数：{self.stats['decoded']}")
        print(f"发射指令数：{self.stats['issued']}")
        print(f"执行指令数：{self.stats['executed']}")
        print(f"提交指令数：{self.stats['committed']}")
        if self.stats['cycles'] > 0:
            ipc = self.stats['committed'] / self.stats['cycles']
            print(f"平均 IPC: {ipc:.3f}")
        print(f"\n停顿统计:")
        total_stalls = sum(self.stats['stalls'].values())
        for stage, count in self.stats['stalls'].items():
            percentage = (count / total_stalls * 100) if total_stalls > 0 else 0
            print(f" {stage}: {count}次 ({percentage:.1f}%)")
        print(f"\n机器并行性效率:")
        theoretical_ipc = self.config['issue_width']
        actual_ipc = self.stats['committed'] / self.stats['cycles'] if self.stats['cycles'] > 0 else 0
        efficiency = (actual_ipc / theoretical_ipc * 100) if theoretical_ipc > 0 else 0
        print(f" 理论最大 IPC: {theoretical_ipc}")
        print(f" 实际平均 IPC: {actual_ipc:.3f}")
        print(f" 效率：{efficiency:.1f}%")

class ModernProcessorCaseStudy:
    """现代处理器案例分析"""
    @staticmethod
    def analyze_intel_alder_lake():
        """分析 Intel Alder Lake 架构"""
        print("\n=== Intel Alder Lake 架构分析 ===")
        architecture = {
            'name': 'Alder Lake',
            'microarchitecture': 'Golden Cove (P-core) + Gracemont (E-core)',
            'manufacturing_process': 'Intel 7 (10nm Enhanced)',
            'max_cores': '16 (8P + 8E)',
            'threads': 24,
            'l1_cache': '80KB per P-core, 64KB per E-core',
            'l2_cache': '1.25MB per P-core, 2MB per 4 E-core cluster',
            'l3_cache': '30MB shared',
            'key_features': ['混合架构：性能核 + 能效核', 'Intel Thread Director：智能线程调度', 'DDR5 内存支持', 'PCIe 5.0 支持', '集成显卡：Intel UHD Graphics'],
            'superscalar_features': {
                'p_core': {
                    'frontend': {
                        'fetch_width': 6, 'decode_width': 6, 'micro_op_cache': '4K entries', 'branch_predictor': '高级 TAGE 预测器'
                    },
                    'execution': {
                        'issue_width': 6, 'retire_width': 8, 'alu_units': 5, 'load_store_units': 3, 'reorder_buffer': 512, 'reservation_stations': 97
                    }
                },
                'e_core': {
                    'frontend': {
                        'fetch_width': 3, 'decode_width': 5, 'micro_op_cache': '共享', 'branch_predictor': '基础预测器'
                    },
                    'execution': {
                        'issue_width': 5, 'retire_width': 8, 'alu_units': 4, 'load_store_units': 2, 'reorder_buffer': 256, 'reservation_stations': 64
                    }
                }
            }
        }
        print(f"架构：{architecture['name']}")
        print(f"微架构：{architecture['microarchitecture']}")
        print(f"制程：{architecture['manufacturing_process']}")
        print(f"核心配置：{architecture['max_cores']}")
        print(f"线程数：{architecture['threads']}")
        print(f"\n性能核 (P-core) 超标量特性:")
        p_core = architecture['superscalar_features']['p_core']
        print(f" 前端:")
        print(f" • 取指宽度：{p_core['frontend']['fetch_width']}")
        print(f" • 译码宽度：{p_core['frontend']['decode_width']}")
        print(f" • 微操作缓存：{p_core['frontend']['micro_op_cache']}")
        print(f" 执行引擎:")
        print(f" • 发射宽度：{p_core['execution']['issue_width']}")
        print(f" • 提交宽度：{p_core['execution']['retire_width']}")
        print(f" • ALU 单元：{p_core['execution']['alu_units']}")
        print(f" • 重排序缓冲：{p_core['execution']['reorder_buffer']}条目")
        print(f"\n能效核 (E-core) 超标量特性:")
        e_core = architecture['superscalar_features']['e_core']
        print(f" 发射宽度：{e_core['execution']['issue_width']}")
        print(f" 重排序缓冲：{e_core['execution']['reorder_buffer']}条目")
        print(f"\n关键创新:")
        for feature in architecture['key_features']:
            print(f" • {feature}")
        print(f"\n性能优势:")
        print(f" 1. 单线程性能：性能核提供高 IPC")
        print(f" 2. 多线程吞吐量：能效核增加并行度")
        print(f" 3. 能效优化：根据负载动态分配线程")
        print(f" 4. 缓存效率：智能缓存分配策略")

    @staticmethod
    def analyze_apple_m1():
        """分析 Apple M1 架构"""
        print("\n=== Apple M1 架构分析 ===")
        architecture = {
            'name': 'Apple M1',
            'microarchitecture': 'Firestorm (P-core) + Icestorm (E-core)',
            'manufacturing_process': 'TSMC 5nm',
            'cores': '8 (4P + 4E)',
            'threads': 8,
            'l1_cache': '192KB 指令 + 128KB 数据 per P-core',
            'l2_cache': '12MB shared',
            'system_cache': '16MB',
            'key_features': ['统一内存架构 (UMA)', '神经引擎：16 核心', '媒体引擎：硬件编解码', '安全隔区', '高能效设计'],
            'superscalar_features': {
                'p_core': {
                    'frontend': {
                        'fetch_width': 8, 'decode_width': 8, 'macro_op_fusion': True, 'branch_predictor': '高级预测器'
                    },
                    'execution': {
                        'issue_width': 8, 'retire_width': 8, 'execution_ports': 10, 'integer_alu': 6, 'load_store_units': 4, 'reorder_buffer': 630, 'reservation_stations': '统一'
                    }
                },
                'e_core': {
                    'frontend': {'fetch_width': 4, 'decode_width': 4},
                    'execution': {'issue_width': 4, 'retire_width': 4, 'reorder_buffer': 128}
                }
            }
        }
        print(f"架构：{architecture['name']}")
        print(f"微架构：{architecture['microarchitecture']}")
        print(f"制程：{architecture['manufacturing_process']}")
        print(f"核心：{architecture['cores']}")
        print(f"\n性能核超标量特性:")
        p_core = architecture['superscalar_features']['p_core']
        print(f" 发射宽度：{p_core['execution']['issue_width']} (非常宽)")
        print(f" 重排序缓冲：{p_core['execution']['reorder_buffer']}条目 (非常深)")
        print(f" 执行端口：{p_core['execution']['execution_ports']}")
        print(f"\n关键创新:")
        for feature in architecture['key_features']:
            print(f" • {feature}")
        print(f"\n性能特点:")
        print(f" 1. 宽发射设计：高指令级并行")
        print(f" 2. 深乱序窗口：挖掘更多并行性")
        print(f" 3. 统一内存：减少数据传输开销")
        print(f" 4. 专用加速器：提升特定任务性能")

    @staticmethod
    def programming_recommendations():
        """编程建议"""
        print("\n=== 针对现代超标量处理器的编程建议 ===")
        recommendations = [
            {'category': '数据布局', 'suggestions': ['使用数组结构体 (SoA) 代替结构体数组 (AoS)', '对齐数据到缓存行边界', '将频繁访问的数据放在一起', '避免 false sharing']},
            {'category': '循环优化', 'suggestions': ['使用循环展开增加指令级并行', '减少循环内部的分支', '使用软件预取隐藏内存延迟', '考虑循环分块提高缓存利用率']},
            {'category': '指令选择', 'suggestions': ['使用 SIMD 指令向量化计算', '避免复杂的依赖链', '使用内联函数减少调用开销', '考虑使用编译器内在函数']},
            {'category': '内存访问', 'suggestions': ['顺序访问内存', '利用硬件预取器', '减少缓存缺失', '使用非临时存储指令']},
            {'category': '并行化', 'suggestions': ['使用多线程利用多核', '考虑任务并行和数据并行', '使用适当的同步原语', '平衡负载']}
        ]
        for category in recommendations:
            print(f"\n{category['category']}:")
            for suggestion in category['suggestions']:
                print(f" • {suggestion}")
        # 代码示例
        print("\n代码示例:")
        code_example = """ // 好的实践：缓存友好的矩阵乘法
        void matrixMultiplyGood(const float* A, const float* B, float* C, int n) {
            const int blockSize = 64; // 匹配缓存行大小
            for (int i = 0; i < n; i += blockSize) {
                for (int j = 0; j < n; j += blockSize) {
                    for (int k = 0; k < n; k += blockSize) {
                        // 处理块
                        for (int ii = i; ii < min(i + blockSize, n); ++ii) {
                            for (int kk = k; kk < min(k + blockSize, n); ++kk) {
                                float a = A[ii * n + kk];
                                for (int jj = j; jj < min(j + blockSize, n); ++jj) {
                                    C[ii * n + jj] += a * B[kk * n + jj];
                                }
                            }
                        }
                    }
                }
            }
        }
        // 好的实践：使用 SIMD
        void vectorAddSIMD(float* a, float* b, float* c, int n) {
            #ifdef __AVX512F__
            for (int i = 0; i < n; i += 16) {
                __m512 va = _mm512_load_ps(&a[i]);
                __m512 vb = _mm512_load_ps(&b[i]);
                __m512 vc = _mm512_add_ps(va, vb);
                _mm512_store_ps(&c[i], vc);
            }
            #elif defined(__AVX__)
            for (int i = 0; i < n; i += 8) {
                __m256 va = _mm256_load_ps(&a[i]);
                __m256 vb = _mm256_load_ps(&b[i]);
                __m256 vc = _mm256_add_ps(va, vb);
                _mm256_store_ps(&c[i], vc);
            }
            #else // 标量回退
            for (int i = 0; i < n; i++) {
                c[i] = a[i] + b[i];
            }
            #endif
        } """
        print(code_example)

def main():
    """主函数"""
    # 运行机器并行性模拟
    simulator = MachineParallelismImplementation()
    simulator.run_simulation(cycles=25)
    # 分析现代处理器案例
    ModernProcessorCaseStudy.analyze_intel_alder_lake()
    ModernProcessorCaseStudy.analyze_apple_m1()
    ModernProcessorCaseStudy.programming_recommendations()
    print("\n" + "="*60)
    print("总结")
    print("="*60)
    print("现代超标量处理器通过多种技术实现机器并行性：")
    print("1. 宽发射设计：同时发射多条指令")
    print("2. 深乱序执行：挖掘指令级并行")
    print("3. 高级分支预测：减少控制冒险")
    print("4. 智能缓存：减少内存延迟影响")
    print("5. 专用加速器：提升特定任务性能")
    print("\n作为程序员，了解这些特性有助于编写高性能代码。")

if __name__ == "__main__":
    main()

由于篇幅限制，本文详细介绍了超标量处理器的核心概念、实现技术和实际应用。现代处理器通过复杂的超标量设计实现了极高的性能，但这也对程序员提出了更高的要求。理解这些底层原理不仅有助于编写高性能代码，也为系统优化和架构设计提供了基础。在后续章节中，我们将继续探讨分支预测、执行单元设计等更深入的话题。